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Proceedings Paper

Low power laser driver design in 28nm CMOS for on-chip and chip-to-chip optical interconnect
Author(s): Guido Belfiore; Laszlo Szilagyi; Ronny Henker; Frank Ellinger
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Paper Abstract

This paper discusses the challenges and the trade-offs in the design of laser drivers for very-short distance optical communications. A prototype integrated circuit is designed and fabricated in 28 nm super-low-power CMOS technology. The power consumption of the transmitter is 17.2 mW excluding the VCSEL that in our test has a DC power consumption of 10 mW. The active area of the driver is only 0.0045 mm2. The driver can achieve an error-free (BER < 10 -12) electrical data-rate of 25 Gbit/s using a pseudo random bit sequence of 27 -1. When the driver is connected to the VCSEL module an open optical eye is reported at 15 Gbit/s. In the tested bias point the VCSEL module has a measured bandwidth of 10.7 GHz.

Paper Details

Date Published: 11 September 2015
PDF: 8 pages
Proc. SPIE 9662, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015, 966208 (11 September 2015); doi: 10.1117/12.2202800
Show Author Affiliations
Guido Belfiore, TU Dresden (Germany)
Laszlo Szilagyi, TU Dresden (Germany)
Ronny Henker, TU Dresden (Germany)
Frank Ellinger, TU Dresden (Germany)


Published in SPIE Proceedings Vol. 9662:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015
Ryszard S. Romaniuk, Editor(s)

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