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Proceedings Paper

EUV mask infrastructure readiness and gaps for TD and HVM
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Paper Abstract

The industry is transitioning EUV lithography from feasibility phase to technology development. EUV mask infrastructure needs to be prepared to support the technology development and ready to enable the implementation of EUV lithography for production. In this paper, we review the current status and assess the readiness of key infrastructure modules in EUV mask fabrication, inspection and control, and usage in a mask cycle: blank quality and inspection, pattern inspection, defect disposition and repair, pellicle integration, and handling of pelliclized masks.

Paper Details

Date Published: 11 November 2015
PDF: 14 pages
Proc. SPIE 9635, Photomask Technology 2015, 963509 (11 November 2015); doi: 10.1117/12.2202724
Show Author Affiliations
Ted Liang, Intel Corp. (United States)
John Magana, Intel Corp. (United States)
Kishore Chakravorty, Intel Corp. (United States)
Eric Panning, Intel Corp. (United States)
Guojing Zhang, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 9635:
Photomask Technology 2015
Naoya Hayashi, Editor(s)

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