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Proceedings Paper

Mask CD uniformity improvement by electron scanning exposure based Global Loading Effect Correction
Author(s): Rivan Li; Eric Tian; Irene Shi; Eric Guo; Max Lu
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Paper Abstract

Critical Dimension (CD) Uniformity is one of the necessary parameters to assure good performance and reliable functionality of any integrated circuit (IC), and towards the advanced technology node 28nm and beyond, corresponding CD Uniformity becomes more and more crucial. It is found that bad mask CD Uniformity is a significant error source at 28nm process. The CD Uniformity on mask, if not controlled well, will badly impact wafer CD performance, and it has been well-studied that CD Uniformity issue from gate line-width in transistors would affect the device performance directly. In this paper we present a novel solution for mask global CD uniformity error correction, which is called as global loading effect correction (GLEC) method and applied nesting in the mask exposure map during the electron beam exposure. There are factors such as global chip layout, writing sequence and chip pattern density distribution (Global Loading), that work on the whole mask CD Uniformity, especially Global Loading is the key factor related to mask global CD error. From our experimental results, different pattern density distribution on mask significantly influenced the final mask CD Uniformity: the mask with undulating pattern density distribution provides much worse CD Uniformity than that with uniform one. Therefore, a GLEC model based on pattern density has been created to compensate the global error during the electron beam exposure, which has been proved to be efficacious to improve mask global CD Uniformity performance. Furthermore, it ’s also revealed that pattern type is another important impact factor, and GLEC coefficient need be modified due to the specific pattern type (e.g. dense line-space only, iso-space only or an average of them) to improve the corresponding mask CD uniformity.

Paper Details

Date Published: 9 July 2015
PDF: 5 pages
Proc. SPIE 9658, Photomask Japan 2015: Photomask and Next-Generation Lithography Mask Technology XXII, 96580S (9 July 2015); doi: 10.1117/12.2192988
Show Author Affiliations
Rivan Li, Semiconductor Manufacturing International Corp. (China)
Eric Tian, Semiconductor Manufacturing International Corp. (China)
Irene Shi, Semiconductor Manufacturing International Corp. (China)
Eric Guo, Semiconductor Manufacturing International Corp. (China)
Max Lu, Semiconductor Manufacturing International Corp. (China)

Published in SPIE Proceedings Vol. 9658:
Photomask Japan 2015: Photomask and Next-Generation Lithography Mask Technology XXII
Nobuyuki Yoshioka, Editor(s)

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