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Proceedings Paper

Automatic DFM methodology for bit line pattern dummy
Author(s): Mohamed Bahr
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Paper Abstract

This paper presents an automated DFM solution to generate Bit Line Pattern Dummy (BLPD) for memory chips. Dummy shapes are aligned with memory functional bits lines to ensure uniform and reliable memory device. This paper will present a smarter approach that uses an analysis based technique for adding the dummy fill shapes that have different types according to the space available. Experimental results based on layout of a memory test chip.

Paper Details

Date Published: 18 March 2015
PDF: 7 pages
Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 942715 (18 March 2015); doi: 10.1117/12.2185545
Show Author Affiliations
Mohamed Bahr, Mentor Graphics Corp. (Egypt)


Published in SPIE Proceedings Vol. 9427:
Design-Process-Technology Co-optimization for Manufacturability IX
John L. Sturtevant; Luigi Capodieci, Editor(s)

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