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Proceedings Paper

Estimation technique for SET-tolerance of combinational ICs
Author(s): A. Balbekov; M. Gorbunov
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Paper Abstract

The paper presents an estimation technique for single event transient (SET) tolerance of combinational circuits. Technique provides means to analyze each node contribution to the overall SET tolerance of circuit. A software tool calculates critical charge of each node of circuit, process gathered data and displays it in circuit editor. The technique is technology-independent, it can be applied to nanoscale technologies.

Paper Details

Date Published: 18 December 2014
PDF: 7 pages
Proc. SPIE 9440, International Conference on Micro- and Nano-Electronics 2014, 94401A (18 December 2014); doi: 10.1117/12.2180608
Show Author Affiliations
A. Balbekov, Scientific Research Institute of System Analysis (Russian Federation)
M. Gorbunov, Scientific Research Institute of System Analysis (Russian Federation)
National Research Nuclear Univ. MEPHI (Russian Federation)


Published in SPIE Proceedings Vol. 9440:
International Conference on Micro- and Nano-Electronics 2014
Alexander A. Orlikovsky, Editor(s)

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