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Proceedings Paper

640 x 480 element PtSi IR sensor with low-noise MOS X-Y addressable multiplexer
Author(s): Donald J. Sauer; Fu-Lung Hseuh; Frank V. Shallcross; Grazyna M. Meray; Thomas S. Villani
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Paper Abstract

The design of a 640 by 480 element PtSi IR sensor is presented which includes a low-noise MOS X-Y addressable readout multiplexer and an on-chip correlated double-sampling amplifier. The sensor is designed to load scan data into CMOS horizontal and vertical scanning registers by means of a multiplexed horizontal/vertical input address port and onchip decoding, allowing any element in the focal plane array to be randomly accessed. The FPA is shown to be operable in both the interlaced and noninterlaced formats, with variable exposure control. Enhanced noise performance is shown due to the use of buried channel source follower buffers in the horizontal signal lines. It was shown that 24 micron square pixels with a 1.5 micron double level metal CMOS process provide a fill factor of 38 percent. TTL compatibility and ESD protection diodes are key features of the digital inputs to the sensor's chip.

Paper Details

Date Published: 1 September 1990
PDF: 7 pages
Proc. SPIE 1308, Infrared Detectors and Focal Plane Arrays, (1 September 1990); doi: 10.1117/12.21719
Show Author Affiliations
Donald J. Sauer, David Sarnoff Research Ctr. (United States)
Fu-Lung Hseuh, David Sarnoff Research Ctr. (United States)
Frank V. Shallcross, David Sarnoff Research Ctr. (United States)
Grazyna M. Meray, David Sarnoff Research Ctr. (United States)
Thomas S. Villani, David Sarnoff Research Ctr. (United States)


Published in SPIE Proceedings Vol. 1308:
Infrared Detectors and Focal Plane Arrays
Eustace L. Dereniak; Robert E. Sampson, Editor(s)

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