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Proceedings Paper

Device-scaling constraints based upon delay-time arguments
Author(s): Robert J. Trew; Umesh K. Mishra
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Paper Abstract

Extracted delay times provide information useful for device scaling. In this work a novel parameter extraction technique that permits delay times associated with the physical operation of the transistor, along with element values for an equivalent circuit, to be determined from terminal S-parameter measurements. The technique is employed to investigate the operation of mm-wave AlInAs/GalnAs/InP heterojunction bipolar transistors. High current phenomena, such as the onset of the Kirk Effect, are clearly evident. The results indicate that the base region delay is dominant in determining the high frequency operation of these devices.

Paper Details

Date Published: 1 August 1990
PDF: 12 pages
Proc. SPIE 1288, High-Speed Electronics and Device Scaling, (1 August 1990); doi: 10.1117/12.20905
Show Author Affiliations
Robert J. Trew, North Carolina State Univ. (United States)
Umesh K. Mishra, North Carolina State Univ. (United States)

Published in SPIE Proceedings Vol. 1288:
High-Speed Electronics and Device Scaling
Lester Fuess Eastman, Editor(s)

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