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Proceedings Paper

Room temperature and cryogenic performance of self-aligned AlInAs-GaInAs HEMTs with 0.15-um gate length
Author(s): Umesh K. Mishra; April S. Brown; Linda M. Jelloian; M. Thompson; Steven E. Rosenbaum; Loi D. Nguyen; Paul M. Solomon; Richard A. Kiehl; Y. H. Kwark
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Paper Abstract

A novel self-aligned technique for O.15p.m gate length AlInAs-GalnAs HEMTs has been demonstrated. Devices with an oxide sidewall yielded an fT of 177 GHz whereas devices with no sidewall exhibited an fT greater than 250 GHz. The difference has been related to process damage during plasmé deposition of Si02. An extrinsic fl of 292 GHz was measured at 77K.

Paper Details

Date Published: 1 August 1990
PDF: 9 pages
Proc. SPIE 1288, High-Speed Electronics and Device Scaling, (1 August 1990); doi: 10.1117/12.20904
Show Author Affiliations
Umesh K. Mishra, Hughes Research Labs. (United States)
April S. Brown, Hughes Research Labs. (United States)
Linda M. Jelloian, Hughes Research Labs. (United States)
M. Thompson, Hughes Research Labs. (United States)
Steven E. Rosenbaum, Hughes Research Labs. (United States)
Loi D. Nguyen, Hughes Research Labs. (United States)
Paul M. Solomon, IBM/Thomas J. Watson Research (United States)
Richard A. Kiehl, IBM/Thomas J. Watson Research (United States)
Y. H. Kwark, IBM/Thomas J. Watson Research (United States)


Published in SPIE Proceedings Vol. 1288:
High-Speed Electronics and Device Scaling
Lester Fuess Eastman, Editor(s)

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