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Proceedings Paper

VLSI physical design analyzer: A profiling and data mining tool
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Paper Abstract

Traditional physical design verification tools employ a deck of known design rules, each of which has a pre-defined pass/fail criteria associated with it. While passing a design rule deck is a necessary condition for a VLSI design to be manufacturable, it is not sufficient. Other physical design profiling decks that attempt to obtain statistical information about the various critical dimensions in the VLSI design lack a systematic methodology for rule enumeration. These decks are often inadequate, unable to extract all the interlayer and intralayer dimensions in a design that have a correlation with process yield. The Physical Design Analyzer is a comprehensive design analysis tool built with the objective of exhaustively exploring design-process correlations to increase the wafer yield.

Paper Details

Date Published: 18 March 2015
PDF: 8 pages
Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 942712 (18 March 2015); doi: 10.1117/12.2087078
Show Author Affiliations
Shikha Somani, GLOBALFOUNDRIES Inc. (United States)
Piyush Verma, GLOBALFOUNDRIES Inc. (United States)
Sriram Madhavan, GLOBALFOUNDRIES Inc. (United States)
Fadi Batarseh, GLOBALFOUNDRIES Inc. (United States)
Robert C. Pack, GLOBALFOUNDRIES Inc. (United States)
Luigi Capodieci, GLOBALFOUNDRIES Inc. (United States)


Published in SPIE Proceedings Vol. 9427:
Design-Process-Technology Co-optimization for Manufacturability IX
John L. Sturtevant; Luigi Capodieci, Editor(s)

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