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Proceedings Paper

Power noise rejection and device noise analysis at the reference level of ramp ADC
Author(s): Peter Ahn; JiYong Um; EunJung Choi; HyunMook Park; JaSeung Gou; KwangJun Cho; KangBong Seo; SangDong Yoo
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Paper Abstract

Sources of noise that corrupt the reference level VREF during a ramp ADC operation are identified and analyzed. For power noise analysis, PSR of bandgap reference and current generator are investigated through small signal circuits. For device noise appearing at the reference level, noise contribution from each device is expressed in terms of design variables. The identified design variables are arranged in a table to serve as a guide for low noise CMOS imager design.

Paper Details

Date Published: 13 March 2015
PDF: 11 pages
Proc. SPIE 9403, Image Sensors and Imaging Systems 2015, 94030M (13 March 2015); doi: 10.1117/12.2083099
Show Author Affiliations
Peter Ahn, SK Hynix, Inc. (Korea, Republic of)
JiYong Um, SK Hynix, Inc. (Korea, Republic of)
EunJung Choi, SK Hynix, Inc. (Korea, Republic of)
HyunMook Park, SK Hynix, Inc. (Korea, Republic of)
JaSeung Gou, SK Hynix, Inc. (Korea, Republic of)
KwangJun Cho, SK Hynix, Inc. (Korea, Republic of)
KangBong Seo, SK Hynix, Inc. (Korea, Republic of)
SangDong Yoo, SK Hynix, Inc. (Korea, Republic of)


Published in SPIE Proceedings Vol. 9403:
Image Sensors and Imaging Systems 2015
Ralf Widenhorn; Antoine Dupret, Editor(s)

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