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Proceedings Paper

Efficient full-chip QA Tool for design to mask (D2M) feature variability verification
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Paper Abstract

Techniques to control Across Chip CD Variation are very important in IC design, since it directly impacts the electrical timing and functionality of the designs. VLSI designs today include a rich variety of electrical devices (different gate oxide thicknesses, different threshold voltages, etc.) to provide the much needed flexibility to the chip designer. These devices occur at different proximities and different densities on a full chip design. In this paper, we describe a method for improving and ensuring design-to-mask (D2M) quality via a quantitative relationship between design specification and full chip tapeout results. This is done by applying a layout profiling technique with the aim of capturing comprehensive representation of the design space, this method ensures the quality of design-to-mask flow prior to release OPC data to mask house.

Paper Details

Date Published: 8 October 2014
PDF: 9 pages
Proc. SPIE 9235, Photomask Technology 2014, 92351Y (8 October 2014); doi: 10.1117/12.2069346
Show Author Affiliations
Fadi Batarseh, GLOBALFOUNDRIES Inc. (United States)
Piyush Verma, GLOBALFOUNDRIES Inc. (United States)
Robert Pack, GLOBALFOUNDRIES Inc. (United States)
Shikha Somani, GLOBALFOUNDRIES Inc. (United States)


Published in SPIE Proceedings Vol. 9235:
Photomask Technology 2014
Paul W. Ackmann; Naoya Hayashi, Editor(s)

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