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Proceedings Paper

Design of a high-performance pyramid architecture
Author(s): M. Fikret Ercan; Yu-Fai Fung
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Paper Abstract

In this paper, we are going to introduce a pyramid architecture, which we are currently constructing for computer vision applications. Some of the architectural features of the system is its linear array interconnections, reconfigurable architecture and its design without top-down control mechanism. The system is targeted to use in real time image processing applications, so that high performance processors are used during construction. It has three processing layers for three different stages of image processing. Each layer has direct access to image source. Architectural properties of the system, its control mechanism and expected performance, are outlined in the following sections.

Paper Details

Date Published: 21 April 1995
PDF: 7 pages
Proc. SPIE 2501, Visual Communications and Image Processing '95, (21 April 1995); doi: 10.1117/12.206756
Show Author Affiliations
M. Fikret Ercan, Hong Kong Polytechnic Univ. (Hong Kong)
Yu-Fai Fung, Hong Kong Polytechnic Univ. (Hong Kong)


Published in SPIE Proceedings Vol. 2501:
Visual Communications and Image Processing '95
Lance T. Wu, Editor(s)

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