Share Email Print
cover

Proceedings Paper

Receiver design issues for parallel optical interconnections fabricated in the FET-SEED technology
Author(s): Robert A. Novotny; Anthony L. Lentine; Leo M. F. Chirovsky; Ted K. Woodward
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

This paper discusses the sensitivity limitations of smart pixel optical receiver arrays fabricated in the GaAs FET-SEED technology. Four circuit topologies (high impedance clamped, resistive load partially clamped, differential transamp, and common gate) are compared. Simulated and experimental data are presented.

Paper Details

Date Published: 5 April 1995
PDF: 13 pages
Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); doi: 10.1117/12.206320
Show Author Affiliations
Robert A. Novotny, AT&T Bell Labs. (United States)
Anthony L. Lentine, AT&T Bell Labs. (United States)
Leo M. F. Chirovsky, AT&T Bell Labs. (United States)
Ted K. Woodward, AT&T Bell Labs. (United States)


Published in SPIE Proceedings Vol. 2400:
Optoelectronic Interconnects III
Ray T. Chen; Harvard Scott Hinton, Editor(s)

© SPIE. Terms of Use
Back to Top