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Proceedings Paper

Interconnection issues for vertical-to-surface-transmission electrophotonic device (VSTEP) optoelectronic information processing systems
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Paper Abstract

We simulate parallel and serial implementations of functions on VSTEP (vertical to surface transmission electro-photonic device) based digital optical computing architectures. Taking optical thyristors as representative devices, we find that intrinsic fan-in and fan-out losses negate many of the speed advantages of the parallel implementation. However, in the regime where VSTEP rise- and fall-times are of the same order as transcription time the parallel solution becomes more attractive.

Paper Details

Date Published: 5 April 1995
PDF: 10 pages
Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); doi: 10.1117/12.206310
Show Author Affiliations
Andrew G. Kirk, Vrije Univ. Brussels (Belgium)
Hugo Thienpont, Vrije Univ. Brussels (Belgium)


Published in SPIE Proceedings Vol. 2400:
Optoelectronic Interconnects III
Ray T. Chen; Harvard Scott Hinton, Editor(s)

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