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Proceedings Paper

Test chip fabrication of 3D optically coupled common memory for parallel processing system
Author(s): Mitsumasa Koyanagi; Koji Miyake; Shin Yokoyama; Masataka Hirose; Tadashi Ae; Yasuhiro Horiike
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Paper Abstract

We have proposed a new three-dimensional optically coupled common memory (3D-OCC memory) to solve the problem of bus bottle neck in the multi-processor system with the shared memories. Three-dimensional-OCC memory consists of several memory layers vertically stacked and a block of data is simultaneously transferred among these memories using vertically optical interconnection. Three-dimensional-OCC memory acts as the real shared memory. Three-dimensional-OCC memory test chip has been fabricated using 2 micrometers CMOS technology. LEDs are integrated on the silicon test chip by using a newly developed micro-bonding technology. We observed the uniform photon emission from these LEDs. In addition, the basic operation of 3D-OCC memory for optical writing/electrical reading was confirmed using this test chip.

Paper Details

Date Published: 5 April 1995
PDF: 8 pages
Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); doi: 10.1117/12.206304
Show Author Affiliations
Mitsumasa Koyanagi, Tohoku Univ. (Japan)
Koji Miyake, Hiroshima Univ. (Japan)
Shin Yokoyama, Hiroshima Univ. (Japan)
Masataka Hirose, Hiroshima Univ. (Japan)
Tadashi Ae, Hiroshima Univ. (Japan)
Yasuhiro Horiike, Toyo Univ. (Japan)


Published in SPIE Proceedings Vol. 2400:
Optoelectronic Interconnects III
Ray T. Chen; Harvard Scott Hinton, Editor(s)

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