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Proceedings Paper

Novel Si-substrate-mode-based wafer scale optical clock distribution architecture
Author(s): Luke A. Graham; Oleg A. Ershov; Suning Tang; Ray T. Chen
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Paper Abstract

In this paper we demonstrate a novel Si wafer based optical clock distribution technique operating 1.3 micrometers and based on a central polygonal input coupling grating structure and surrounding rings of linear output coupling gratings. In this arrangement, both the central polygonal and linear output gratings have a period of 1 micrometers , allowing light to be efficiently coupled into and out of the Si wafer substrate mode in the surface normal direction. A double side polished Si wafer is used to limit the surface scattering losses as the signal travels through the bulk of the Si wafer. One of the major advantages of this technique is that, since the gratings can be written onto the Si surface using optical contact lithography and reactive ion etching, an array of grating shapes and depths can be selected to optimize the diffraction efficiency and focus the output beams onto the associated multi-chip module (MCM). This helps to reduce the optical power requirements that a future system would have and also allows for greater flexibility in system packaging design.

Paper Details

Date Published: 5 April 1995
PDF: 6 pages
Proc. SPIE 2400, Optoelectronic Interconnects III, (5 April 1995); doi: 10.1117/12.206303
Show Author Affiliations
Luke A. Graham, Univ. of Texas/Austin (United States)
Oleg A. Ershov, Univ. of Texas/Austin (United States)
Suning Tang, Univ. of Texas/Austin (United States)
Ray T. Chen, Univ. of Texas/Austin (United States)

Published in SPIE Proceedings Vol. 2400:
Optoelectronic Interconnects III
Ray T. Chen; Harvard Scott Hinton, Editor(s)

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