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Proceedings Paper

Advanced CD-SEM metrology for pattern roughness and local placement of lamellar DSA
Author(s): Takeshi Kato; Akiyuki Sugiyama; Kazuhiro Ueda; Hiroshi Yoshida; Shinji Miyazaki; Tomohiko Tsutsumi; JiHoon Kim; Yi Cao; Guanyang Lin
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Paper Abstract

Directed self-assembly (DSA) applying chemical epitaxy is one of the promising lithographic solutions for next generation semiconductor device manufacturing. We introduced Fingerprint Edge Roughness (FER) as an index to evaluate edge roughness of non-guided lamella finger print pattern, and found its correlation with the Line Edge Roughness (LER) of the lines assembled on the chemical guiding patterns. In this work, we have evaluated both FER and LER at each process steps of the LiNe DSA flow utilizing PS-b-PMMA block copolymers (BCP) assembled on chemical template wafers fabricated with Focus Exposure Matrix (FEM). As a result, we found the followings. (1) Line widths and space distances of the DSA patterns slightly differ to each other depending on their relative position against the chemical guide patterns. Appropriate condition that all lines are in the same dimensions exists, but the condition is not always same for the spaces. (2) LER and LWR (Line Width Roughness) of DSA patterns neither depend on width nor LER of the guide patterns. (3) LWR of DSA patterns are proportional to the width roughness of fingerprint pattern. (4) FER is influenced not only by the BCP formulation, but also by its film thickness. We introduced new methods to optimize the BCP formulation and process conditions by using FER measurement and local CD valuation measurement.

Publisher’s Note: This paper, originally published on 2 April 2014, was replaced with a corrected/revised version on 14 May 2014. If you downloaded the original PDF but are unable to access the revision, please contact SPIE Digital Library Customer Service for assistance.

Paper Details

Date Published: 2 April 2014
PDF: 11 pages
Proc. SPIE 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII, 90501T (2 April 2014); doi: 10.1117/12.2060924
Show Author Affiliations
Takeshi Kato, Hitachi High-Technologies Corp. (Japan)
Akiyuki Sugiyama, Hitachi High-Technologies Corp. (Japan)
Kazuhiro Ueda, Hitachi High-Technologies Corp. (Japan)
Hiroshi Yoshida, Hitachi, Ltd. (Japan)
Shinji Miyazaki, AZ Electronic Materials Japan K.K. (Japan)
Tomohiko Tsutsumi, AZ Electronic Materials Japan Corp. (Japan)
JiHoon Kim, AZ Electronic Materials USA Corp. (United States)
Yi Cao, AZ Electronic Materials USA Corp. (United States)
Guanyang Lin, AZ Electronic Materials USA Corp. (United States)


Published in SPIE Proceedings Vol. 9050:
Metrology, Inspection, and Process Control for Microlithography XXVIII
Jason P. Cain; Martha I. Sanchez, Editor(s)

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