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Proceedings Paper

FPGA architectures for electronically scanned wide-band RF beams using 3-D FIR/IIR digital filters for rectangular array aperture receivers
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Paper Abstract

Real-time digital implementation of three-dimensional (3-D) infinite impulse response (IIR) beam filters are discussed. The 3-D IIR filter building blocks have filter coefficients, which are defined using algebraic closed-form expressions that are functions of desired beam personalities, such as the look-direction of the aperture, the bandwidth and sampling frequency of interest, inter antenna spacing, and 3dB beam size. Real-time steering of such 3-D beam filters are obtained by proposed calculation of filter coefficients. Application specific computing units for rapidly calculating the 3-D IIR filter coefficients at nanosecond speed potentially allows fast real-time tracking of low radar cross section (RCS) objects at close range. Proposed design consists of 3-D IIR beam filter with 4 4 antenna grid and the filter coefficient generation block in separate FPGAs. The hardware is designed and co-simulated using a Xilinx Virtex-6 XC6VLX240T FPGA. The 3-D filter operates over 90 MHz and filter coefficient computing structure can operate at up to 145 MHz.

Paper Details

Date Published: 29 May 2014
PDF: 8 pages
Proc. SPIE 9077, Radar Sensor Technology XVIII, 907702 (29 May 2014); doi: 10.1117/12.2050664
Show Author Affiliations
Sewwandi Wijayaratna, Univ. of Akron (United States)
Arjuna Madanayake, The Univ. of Akron (United States)
Brandon D. Beall, Univ. of Akron (United States)
Len T. Bruton, Univ. of Calgary (Canada)


Published in SPIE Proceedings Vol. 9077:
Radar Sensor Technology XVIII
Kenneth I. Ranney; Armin Doerry, Editor(s)

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