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Proceedings Paper

Highly effective and accurate weak point monitoring method for advanced design rule (1x nm) devices
Author(s): Jeongho Ahn; ShiJin Seong; Minjung Yoon; Il-Suk Park; HyungSeop Kim; Dongchul Ihm; Soobok Chin; Gangadharan Sivaraman; Mingwei Li; Raghav Babulnath; Chang Ho Lee; Satya Kurada; Christine Brown; Rajiv Galani; JaeHyun Kim
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Paper Abstract

Historically when we used to manufacture semiconductor devices for 45 nm or above design rules, IC manufacturing yield was mainly determined by global random variations and therefore the chip manufacturers / manufacturing team were mainly responsible for yield improvement. With the introduction of sub-45 nm semiconductor technologies, yield started to be dominated by systematic variations, primarily centered on resolution problems, copper/low-k interconnects and CMP. These local systematic variations, which have become decisively greater than global random variations, are design-dependent [1, 2] and therefore designers now share the responsibility of increasing yield with manufacturers / manufacturing teams. A widening manufacturing gap has led to a dramatic increase in design rules that are either too restrictive or do not guarantee a litho/etch hotspot-free design. The semiconductor industry is currently limited to 193 nm scanners and no relief is expected from the equipment side to prevent / eliminate these systematic hotspots. Hence we have seen a lot of design houses coming up with innovative design products to check hotspots based on model based lithography checks to validate design manufacturability, which will also account for complex two-dimensional effects that stem from aggressive scaling of 193 nm lithography. Most of these hotspots (a.k.a., weak points) are especially seen on Back End of the Line (BEOL) process levels like Mx ADI, Mx Etch and Mx CMP. Inspecting some of these BEOL levels can be extremely challenging as there are lots of wafer noises or nuisances that can hinder an inspector’s ability to detect and monitor the defects or weak points of interest. In this work we have attempted to accurately inspect the weak points using a novel broadband plasma optical inspection approach that enhances defect signal from patterns of interest (POI) and precisely suppresses surrounding wafer noises. This new approach is a paradigm shift in wafer inspection by leveraging systematic defect locations for high sensitivity inspection, thereby enhancing the discovery and monitoring of yield-limiting defects at traditional optical inspection throughput.

Paper Details

Date Published: 2 April 2014
PDF: 8 pages
Proc. SPIE 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII, 905018 (2 April 2014); doi: 10.1117/12.2046651
Show Author Affiliations
Jeongho Ahn, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
ShiJin Seong, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Minjung Yoon, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Il-Suk Park, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
HyungSeop Kim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Dongchul Ihm, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Soobok Chin, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Gangadharan Sivaraman, KLA-Tencor Corp. (United States)
Mingwei Li, KLA-Tencor Corp. (United States)
Raghav Babulnath, KLA-Tencor Corp. (United States)
Chang Ho Lee, KLA-Tencor Corp. (United States)
Satya Kurada, KLA-Tencor Corp. (United States)
Christine Brown, KLA-Tencor Corp. (United States)
Rajiv Galani, KLA-Tencor Corp. (United States)
JaeHyun Kim, KLA-Tencor Corp. (United States)

Published in SPIE Proceedings Vol. 9050:
Metrology, Inspection, and Process Control for Microlithography XXVIII
Jason P. Cain; Martha I. Sanchez, Editor(s)

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