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Proceedings Paper

Model based multilayers fix for litho hotspots beyond 20nm node
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Paper Abstract

Sub-20nm node designs are getting more sophisticated, and printability issues become more critical which need more advanced techniques to fix. It is mandatory for designers to run lithography checks before tapeout, and it is very challenging to fix all of the generated hotspots manually without introducing unintentional hotspots, or DPT violations. This paper presents a methodology for fixing hotspots on DPT layouts, using the same Model Based Hints (MBH) engine used for detecting hotspots. The fix is based on DRC and DPT constrained minimum movement of edges causing the hotspot, which guarantees that the fix does not violate any of the specified DRC or DPT constraints, nor does it need recoloring. The fix is extended along multilayers to fulfill the specified DRC and DPT constraints and guarantees circuit connectivity along the layers stack. This multilayers approach fixes hotspots that were impossible to fix previously. This methodology is demonstrated on industrial designs, where real hotspots were fixed and the fixing rate is reported.

Paper Details

Date Published: 28 March 2014
PDF: 8 pages
Proc. SPIE 9053, Design-Process-Technology Co-optimization for Manufacturability VIII, 90530F (28 March 2014); doi: 10.1117/12.2045744
Show Author Affiliations
Asmaa Rabie, MentorGraphics Corp. (Egypt)
Kareem Madkour, MentorGraphics Corp. (Egypt)
Kirolos George, MentorGraphics Corp. (Egypt)
Wael ElManhawy, Mentor Graphics Corp. (United States)
Jean-Marie Brunet, Mentor Graphics Corp. (United States)
Joe Kwan, Mentor Graphics Corp. (United States)


Published in SPIE Proceedings Vol. 9053:
Design-Process-Technology Co-optimization for Manufacturability VIII
John L. Sturtevant; Luigi Capodieci, Editor(s)

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