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Proceedings Paper

Optical technologies for TSV inspection
Author(s): Arun A. Aiyer; Nikolai Maltsev; Jae Ryu
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Paper Abstract

In this paper, Frontier Semiconductor will introduce a new technology that is referred to as Virtual Interface Technology (VIT™). VIT™ is a Fourier domain technique that utilizes temporal phase shear of the measurement beam. The unique configuration of the sensor enables measurement of wafer and bonded stack thicknesses ranging from a few microns to millimeters with measurement repeatability ~ nm and resolution of approximately 0.1% of nominal thickness or depth. We will present data on high aspect ratio via measurements (depth, top critical dimension, bottom critical dimension, via bottom profile and side wall angle), bonded wafer stack thickness, and Cu bump measurements. A complimentary tool developed at FSM is a high resolution μRaman spectrometer to measure stress-change in Si lattice induced by Through Silicon Via (TSV) processes. These measurements are important to determine Keep-Out-Zone in the areas where devices are built so that the engineered gate strain is not altered by TSV processing induced strain. Applications include via post-etch; via post fill, and bottom Cu nail stress measurements. The capabilities of and measurement results from both tools are discussed below.

Paper Details

Date Published: 2 April 2014
PDF: 11 pages
Proc. SPIE 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII, 90500B (2 April 2014); doi: 10.1117/12.2045705
Show Author Affiliations
Arun A. Aiyer, Frontier Semiconductor, Inc. (United States)
Nikolai Maltsev, Frontier Semiconductor, Inc. (United States)
Jae Ryu, Frontier Semiconductor, Inc. (United States)


Published in SPIE Proceedings Vol. 9050:
Metrology, Inspection, and Process Control for Microlithography XXVIII
Jason P. Cain; Martha I. Sanchez, Editor(s)

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