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Proceedings Paper

Parallel processing architectures for image processing systems
Author(s): Michael Vahey; Robert F. Cody
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Paper Abstract

Recent image processing systems are exploiting available high computing throughputs in parallel processing architectures. Algorithms are becoming more adaptive to specific clutter and scene content. Data dependencies are being used for more robust operation. This, in turn, increases the number of compute operations required per pixel or image frame.

This paper describes the relationships between key enablers that meet system performance, density, and program requirements. Specifically, it addresses advances in processing element throughput and parallel processing technology for meeting system timelines and use of COTS technology for meeting program cost and schedule requirements.

Paper Details

Date Published: 25 April 1995
PDF: 14 pages
Proc. SPIE 10279, Digital Signal Processing Technology: A Critical Review, 102790E (25 April 1995); doi: 10.1117/12.204205
Show Author Affiliations
Michael Vahey, Hughes Aircraft Co. (United States)
Robert F. Cody, Hughes Aircraft Co. (United States)


Published in SPIE Proceedings Vol. 10279:
Digital Signal Processing Technology: A Critical Review
Panos Papamichalis; Robert D. Kerwin, Editor(s)

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