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Proceedings Paper

FPGA based fast synchronous serial multi-wire links synchronization
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Paper Abstract

The paper debates synchronization method of multi-wire, serial link of constant latency, by means of pseudo-random numbers generators. The solution was designed for various families of FPGA circuits. There were debated synchronization algorithm and functional structure of parameterized transmitter and receiver modules. The modules were realized in VHDL language in a behavioral form.

Paper Details

Date Published: 25 October 2013
PDF: 10 pages
Proc. SPIE 8903, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2013, 89032D (25 October 2013); doi: 10.1117/12.2036183
Show Author Affiliations
Krzysztof T. Pozniak, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 8903:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2013
Ryszard S. Romaniuk, Editor(s)

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