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Proceedings Paper

Bipolar transistor in VESTIC technology
Author(s): Wiesław Kuźmicz; Piotr Mierzwiński
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Paper Abstract

VESTIC technology was proposed as an alternative for traditional CMOS technology. It offers a new FET-type twin gate junctionless device called VeSFET. In addition, in the basic VESTIC device structure many different active devices can be made, including bipolar transistors. This allows easy integration of bipolar transistors (called here VeSBJT) with VeSFET transistors. The purpose of this paper is to investigate the expected properties of VeSBJT in order to answer the following questions: are the expected parameters of VeSBJT promising enough to justify further research and fabrication experiments, and will VeSBJTs be technologically compatible with VeSFETs? Our theoretical predictions are based on the concept of effective base width for bipolar transistors with non-plane-parallel emitter and collector junctions. The conclusion is that VeSBJT can be a device with useful characteristics. As a result, VESTIC may have the potential to become a new BiCMOS-type technology.

Paper Details

Date Published: 25 July 2013
PDF: 7 pages
Proc. SPIE 8902, Electron Technology Conference 2013, 89020M (25 July 2013); doi: 10.1117/12.2031182
Show Author Affiliations
Wiesław Kuźmicz, Warsaw Univ. of Technology (Poland)
Piotr Mierzwiński, Warsaw Univ. of Technology (Poland)

Published in SPIE Proceedings Vol. 8902:
Electron Technology Conference 2013
Pawel Szczepanski; Ryszard Kisiel; Ryszard S. Romaniuk, Editor(s)

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