Share Email Print
cover

Proceedings Paper

Technology of silicon charged-particle detectors developed at the Institute of Electron Technology (ITE)
Author(s): Iwona Wegrzecka; Andrzej Panas; Jan Bar; Tadeusz Budzyński; Piotr Grabiec; Roman Kozłowski; Jerzy Sarnecki; Wojciech Słysz; Dariusz Szmigiel; Maciej Węgrzecki; Michał Zaborowski
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

The paper discusses the technology of silicon charged-particle detectors developed at the Institute of Electron Technology (ITE). The developed technology enables the fabrication of both planar and epiplanar p+-ν-n+ detector structures with an active area of up to 50 cm2. The starting material for epiplanar structures are silicon wafers with a high-resistivity n-type epitaxial layer ( ν layer - ρ < 3 kΩcm) deposited on a highly doped n+-type substrate (ρ< 0,02Ωcm) developed and fabricated at the Institute of Electronic Materials Technology. Active layer thickness of the epiplanar detectors (νlayer) may range from 10 μm to 150 μm. Imported silicon with min. 5 kΩcm resistivity is used to fabricate planar detectors. Active layer thickness of the planar detectors (ν) layer) may range from 200 μm to 1 mm. This technology enables the fabrication of both discrete and multi-junction detectors (monolithic detector arrays), such as single-sided strip detectors (epiplanar and planar) and double-sided strip detectors (planar). Examples of process diagrams for fabrication of the epiplanar and planar detectors are presented in the paper, and selected technological processes are discussed.

Paper Details

Date Published: 25 July 2013
PDF: 7 pages
Proc. SPIE 8902, Electron Technology Conference 2013, 89021I (25 July 2013); doi: 10.1117/12.2031044
Show Author Affiliations
Iwona Wegrzecka, Instytut Technologii Elektronowej (Poland)
Andrzej Panas, Instytut Technologii Elektronowej (Poland)
Jan Bar, Instytut Technologii Elektronowej (Poland)
Tadeusz Budzyński, Instytut Technologii Elektronowej (Poland)
Piotr Grabiec, Instytut Technologii Elektronowej (Poland)
Roman Kozłowski, Instytut Technologii Materiałów Elektronicznych (Poland)
Jerzy Sarnecki, Instytut Technologii Materiałów Elektronicznych (Poland)
Wojciech Słysz, Instytut Technologii Elektronowej (Poland)
Dariusz Szmigiel, Instytut Technologii Elektronowej (Poland)
Maciej Węgrzecki, Instytut Technologii Elektronowej (Poland)
Michał Zaborowski, Instytut Technologii Elektronowej (Poland)


Published in SPIE Proceedings Vol. 8902:
Electron Technology Conference 2013
Pawel Szczepanski; Ryszard Kisiel; Ryszard S. Romaniuk, Editor(s)

© SPIE. Terms of Use
Back to Top