Share Email Print

Proceedings Paper

In-situ repair qualification by applying Computational Metrology and Inspection (CMI) technologies
Author(s): C. Y. Chen; Ivan Wei; Laurent Tuo; C. S. Yoo; Dongxue Chen; Danping Peng; Masaki Satake; Bo Su; Linyong Pang
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Computational techniques have been widely adapted in furthering resolution of optical lithography. Now such techniques are expanded into inspection and metrology with many new applications in mask houses and wafer Fabs enabling process advancement, improving process cycle time, and eliminating operator errors. One area of those applications is mask repair. Many times defects repaired do not pass the AIMS check therefore, the mask has to be reloaded back to repair tool to perform another round of repair and verification. Adding more loops of repair and AIMS check significant increases the mask cycle time and effectively reduces the potential throughput of the AIMS and repair tools. Ideally, the mask should not be removed from repair tool until all defects are repaired successfully. Simulation based In-situ Repair Qualifier (IRQ) was developed to meet this goal. IRQ takes SEM image of a repaired site and then simulates the aerial image using the exact scanner optical and illumination conditions (including free form sources). If the CD on the aerial image does not meet spec, the defect has to be repaired again until it does. By doing so, the chance of having repaired defects not meeting the AIMS spec is dramatically reduced or eliminated. In this paper, we will discuss the technical challenges in detail and present results demonstrating the accuracy and benefits of IRQ. Results on both programmed defects and real defects from product masks will be presented. The repair cycle time improvements and effective tool capacity gains before and after using IRQ are presented.

Paper Details

Date Published: 28 June 2013
PDF: 11 pages
Proc. SPIE 8701, Photomask and Next-Generation Lithography Mask Technology XX, 870108 (28 June 2013); doi: 10.1117/12.2030688
Show Author Affiliations
C. Y. Chen, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Ivan Wei, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Laurent Tuo, Taiwan Semiconductor Manufacturing Co. (Taiwan)
C. S. Yoo, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Dongxue Chen, Luminescent Technologies, Inc. (United States)
Danping Peng, Luminescent Technologies, Inc. (United States)
Masaki Satake, Luminescent Technologies, Inc. (United States)
Bo Su, Luminescent Technologies, Inc. (United States)
Linyong Pang, Luminescent Technologies, Inc. (United States)

Published in SPIE Proceedings Vol. 8701:
Photomask and Next-Generation Lithography Mask Technology XX
Kokoro Kato, Editor(s)

© SPIE. Terms of Use
Back to Top