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Proceedings Paper

An IOMMU for hardware-assisted full virtualization of heterogeneous multi-core SoCs
Author(s): G. Kornaros; K. Harteros; M. Astrinaki; I. Christoforakis; M. Coppola; M. D. Grammatikakis
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Paper Abstract

Hardware virtualization is a major challenge in embedded virtualization. The key to improving resource utilization in a virtualized system is to allow maximum possible resource access operations to perform natively with minimal intervention by the virtual machine monitor, while at the same time ensuring protected operation among different virtual machines’ address space. An innovative I/O Memory Management Unit component (IOMMU) is architected to enable mapping of virtual addresses from multiple devices to the correct VM’s physical memory locations, offering enhanced protection, scatter-gather functions on distributed memory organizations, high performance supported by a configurable TLB and an integrated lightweight hardware monitoring unit to facilitate dynamic system optimizations. This new IOMMU is designed in a modular way supporting address translation along with protection and security extensions. The principal objective is to ensure device isolation by safely mapping a device to a particular guest without risking the integrity of other guests. Additionally, the IOMMU is designed to provide an increased level of security in scenarios without virtualization; with the aid of the IOMMU, the operating system is able to protect itself from malicious device drivers by limiting a device's memory accesses and managing the permissions of peripheral devices.

Paper Details

Date Published: 28 May 2013
PDF: 10 pages
Proc. SPIE 8764, VLSI Circuits and Systems VI, 87640C (28 May 2013); doi: 10.1117/12.2018020
Show Author Affiliations
G. Kornaros, Technological Educational Institute of Crete (Greece)
K. Harteros, Technological Educational Institute of Crete (Greece)
M. Astrinaki, Technological Educational Institute of Crete (Greece)
I. Christoforakis, Technological Educational Institute of Crete (Greece)
M. Coppola, STMicroelectronics (France)
M. D. Grammatikakis, Technological Educational Institute of Crete (Greece)


Published in SPIE Proceedings Vol. 8764:
VLSI Circuits and Systems VI
Teresa Riesgo; Massimo Conti, Editor(s)

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