Share Email Print

Proceedings Paper

A 1.2 V low-power OpAmp for integrated lock-in amplifiers
Author(s): M. R. Valero; S. Celma; N. Medrano; B. Calvo; C. Gimeno
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

This paper presents a simple 1.2 V low-power rail-to-rail class AB operational amplifier (OpAmp) suitable for integrated lock-in amplifiers. The proposed OpAmp has been designed in a standard 0.18 μm CMOS technology. For a 1.2 V single supply and 68.6 μW power consumption, simulations shows a 81 dB open loop gain, 64° phase margin, 13 MHz unity gain frequency for a capacitive load of 10pF and 75 dB CMRR. Adaptive biasing provides 30.7 V/μs slew-rate for a 10 pF load. A compact and reliable lock-in amplifier (LIA) has been designed using the proposed circuit. The designed LIA has a power consumption of 135 μW and recovers signals up to 1 MHz with relative errors below 2.6 % for noise and interference signals of the same amplitude as the signal of interest.

Paper Details

Date Published: 28 May 2013
PDF: 7 pages
Proc. SPIE 8764, VLSI Circuits and Systems VI, 876406 (28 May 2013); doi: 10.1117/12.2017218
Show Author Affiliations
M. R. Valero, Univ. de Zaragoza (Spain)
S. Celma, Univ. de Zaragoza (Spain)
N. Medrano, Univ. de Zaragoza (Spain)
B. Calvo, Univ. de Zaragoza (Spain)
C. Gimeno, Univ. de Zaragoza (Spain)

Published in SPIE Proceedings Vol. 8764:
VLSI Circuits and Systems VI
Teresa Riesgo; Massimo Conti, Editor(s)

© SPIE. Terms of Use
Back to Top