Share Email Print

Proceedings Paper

Charge-up prevention process for e-beam direct writing with multilayer resist
Author(s): Yoji Tono-oka; Kazuyuki Sakamoto; Toshiyuki Honda; Hiroshi Matsumoto; Yasuo Iida
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

it is essential to avoid charging effects in E-beam direct writing for the fabrication of deep-sub-micron devices. It has been found that a spin-coated surfactant layer over the imaging resist can avoid charging effects. Application of this method to multilayer resist process is presented. With optimum surfactant layer thickness. there is no influence of surfactant layer on resist sensitivity or resolution. The surfactant layer can be removed easily in imaging resist development p r o c e In the case of tn-level resist with a 2.4pm overall thickness. registration error was reduced from I. 0 jim to 0. 1 um( isv. i +26) by adding a 0. l2,um-thick surfactant layer. Quarter micron patterns with good profiles were achieved using CMS-EX(R) as the imaging layer.

Paper Details

Date Published: 1 May 1990
PDF: 10 pages
Proc. SPIE 1263, Electron-Beam, X-Ray, and Ion-Beam Technology: Submicrometer Lithographies IX, (1 May 1990); doi: 10.1117/12.20159
Show Author Affiliations
Yoji Tono-oka, NEC Corp. (Japan)
Kazuyuki Sakamoto, NEC Corp. (Japan)
Toshiyuki Honda, NEC Corp. (Japan)
Hiroshi Matsumoto, NEC Corp. (United States)
Yasuo Iida, NEC Corp. (Japan)

Published in SPIE Proceedings Vol. 1263:
Electron-Beam, X-Ray, and Ion-Beam Technology: Submicrometer Lithographies IX
Douglas J. Resnick, Editor(s)

© SPIE. Terms of Use
Back to Top