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Proceedings Paper

Low-dropout regulator with modest ripple and rugged performance in 180nm
Author(s): Sreehari Rao Patri; Krishnaprasad K. S. R.; Suresh Alapati; Rajeshwar Rao
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Paper Abstract

Low-dropout (LDO) regulator with modest ripple and improved transient response is implemented in 0.18μm CMOS technology. The proposed regulator for SOC application can achieve high stability for load current from zero to 100mA. This LDO uses process, temperature independent biasing for error amplifier which makes LDO temperature and process independent. The experimental results show the load regulation of 162 μV/mA and line regulation of 0.9 mV/V. The whole LDO chip consumes a quiescent current of 50 μA with an ultra low dropout voltage of 200mV at the maximum output current of 100mA.

Paper Details

Date Published: 28 January 2013
PDF: 6 pages
Proc. SPIE 8760, International Conference on Communication and Electronics System Design, 87601J (28 January 2013); doi: 10.1117/12.2012306
Show Author Affiliations
Sreehari Rao Patri, National Institute of Technology Warangal (India)
Krishnaprasad K. S. R., National Institute of Technology Warangal (India)
Suresh Alapati, National Institute of Technology Warangal (India)
Rajeshwar Rao, National Institute of Technology Warangal (India)


Published in SPIE Proceedings Vol. 8760:
International Conference on Communication and Electronics System Design
Vijay Janyani; M. Salim; K. K. Sharma, Editor(s)

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