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Proceedings Paper

Process window analysis of algorithmic assist feature placement options at the 2X nm node DRAM
Author(s): Jinhyuck Jeon; Shinyoung Kim; Jookyoung Song; Chanha Park; Hyunjo Yang; Donggyu Yim; Brian Ward; Yunqiang Zhang; Kevin Hooker; Munhoe Do; Jung-Hoe Choi; Stephen Jang
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Paper Abstract

As the industry pushes to ever more complex illumination schemes to increase resolution for next generation memory and logic circuits; subresolution assist feature (SRAF) placement requirements become increasingly severe. Therefore device manufacturers are evaluating improvements in SRAF placement algorithms which do not sacrifice main feature (MF) patterning capability. AF placement algorithms can be categorized broadly as either rule-based (RB), model-based (MB). However, combining these different algorithms into new integrated solutions may enable a more optimal overall solution. RBAF is the baseline AF placement method for many previous technology nodes. Although RBAF algorithm complexity limits its use with very extreme illumination, RBAF is still a powerful option in certain scenarios. One example is for repeating patterns in memory arrays. RBAF algorithms can be finely optimized and verified experimentally without the building of complex models. RBAF also guarantees AF placement consistency based only on the very local geometric environment, which is important in applications where consistent signal propagation is of critical importance. MBAF algorithms deliver the ability to reliably place assist features for enhanced process window control across a wide variety of layout feature configurations and aggressive illumination sources. These methods optimize sophisticated AF placement to improve main feature PW but without performing full main feature OPC. The flexibility of MBAF allows for efficient investigations of future technology nodes as the number of interactions between local layout features increases beyond what RBAF algorithms can effectively support Based on hybrid approach algorithms combining features of the different algorithms using both RBAF and MBAF methods, the generation and placement of SRAF can be a good alternative. Combining of two kinds of SRAF placement options might result in relatively improved process window compared to an independent approach since two methods are capable of supplement each other with a complementary advantages. In this paper we evaluate the impact of SRAF configuration to pattern profile as well as CD margin window and manufacturing applications of MBAF and Hybrid approach algorithms compared to the current OPC without AF. As a conclusion, we suggest methodology to set up optimum SRAF configuration using these AF methods with regard to process window.

Paper Details

Date Published: 29 March 2013
PDF: 12 pages
Proc. SPIE 8684, Design for Manufacturability through Design-Process Integration VII, 86840H (29 March 2013); doi: 10.1117/12.2011450
Show Author Affiliations
Jinhyuck Jeon, SK hynix Semiconductor Inc. (Korea, Republic of)
Shinyoung Kim, SK hynix Semiconductor Inc. (Korea, Republic of)
Jookyoung Song, SK hynix Semiconductor Inc. (Korea, Republic of)
Chanha Park, SK hynix Semiconductor Inc. (Korea, Republic of)
Hyunjo Yang, SK hynix Semiconductor Inc. (Korea, Republic of)
Donggyu Yim, Sk hynix Semiconductor Inc. (Korea, Republic of)
Brian Ward, Synopsys, Inc. (United States)
Yunqiang Zhang, Synopsys, Inc. (United States)
Kevin Hooker, Synopsys, Inc. (United States)
Munhoe Do, Synopsys Korea Inc. (Korea, Republic of)
Jung-Hoe Choi, Synopsys Korea Inc. (Korea, Republic of)
Stephen Jang, Synopsys, Inc. (United States)


Published in SPIE Proceedings Vol. 8684:
Design for Manufacturability through Design-Process Integration VII
Mark E. Mason; John L. Sturtevant, Editor(s)

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