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Proceedings Paper

An investigation of high-order process correction models and techniques to improve overlay control by using multiple-pass cascading analysis at an advanced technology node
Author(s): Md Zakir Ullah; Mohamed Fazly Mohamed Jazim; Stephen Tran; Andy Qiu; Dawn Goh; Jesline Ang; Desmond Goh; David Tien; Kevin Huang; Dongsub Choi
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Paper Abstract

Shrinking semiconductor device nodes are driving continuous overlay improvement. This, in turn, is driving broad adoption of high-order control, especially at today’s advanced nodes. There are two main categories of high-order control: wafer alignment, and process correction. This paper focuses on the inherent disadvantages of high-order process correction models due to data noise and the deterioration of model term stability. In our study, we observed that linear model terms became unstable after the implementation of high-order process corrections, and observed correlations between model parameters. We investigated correlations for both linear and high-order models, and found that all correlation combinations for the linear model had a Pearson correlation coefficient below 0.25, while 22% of the correlation combinations for third order polynomial parameters had a correlation coefficient greater than 0.5. A high correlation coefficient indicates that similar overlay signatures on the wafer can be modeled by different terms, and that there is instability of model terms in the presence of data noise. Advanced process control (APC) corrections are based on historical lot-to-lot model terms, and are applied to each new lot to be exposed. The instability of model terms adversely affects the precise prediction for a new lot. An alternative solution is to use cascading analysis, which calculates the model parameters sequentially using a series of models. The inherent disadvantage of cascading analysis is loss of model fidelity; however, the robust data filtering scheme used in cascading analysis ensures better overlay stability, as shown in the results of this study. This study shows that cascading analysis consistently yields a lower correlation within and across a batch of lots, but with improved overlay control. Several methods of cascading analysis were investigated in terms of the sequence of linear and high-order modeling. This was done to determine the optimal method for implementing cascading analysis, and to determine the implications of cascading analysis in today’s high-volume mass production fabrication facility.

Paper Details

Date Published: 10 April 2013
PDF: 10 pages
Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 86813A (10 April 2013); doi: 10.1117/12.2011448
Show Author Affiliations
Md Zakir Ullah, Micron Semiconductor Asia Pte. Ltd. (Singapore)
Mohamed Fazly Mohamed Jazim, Micron Semiconductor Asia Pte. Ltd. (Singapore)
Stephen Tran, Micron Semiconductor Asia Pte. Ltd. (Singapore)
Andy Qiu, Micron Semiconductor Asia Pte. Ltd. (Singapore)
Dawn Goh, Micron Semiconductor Asia Pte. Ltd. (Singapore)
Jesline Ang, KLA-Tencor (Singapore)
Desmond Goh, KLA-Tencor (Singapore)
David Tien, KLA-Tencor Corp. (United States)
Kevin Huang, KLA-Tencor Corp. (United States)
Dongsub Choi, KLA-Tencor (Korea, Republic of)


Published in SPIE Proceedings Vol. 8681:
Metrology, Inspection, and Process Control for Microlithography XXVII
Alexander Starikov; Jason P. Cain, Editor(s)

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