Share Email Print
cover

Proceedings Paper

A novel methodology for building robust design rules by using design based metrology (DBM)
Author(s): Myeongdong Lee; Seiryung Choi; Jinwoo Choi; Jeahyun Kim; Hyunju Sung; Hyunyoung Yeo; Myoungseob Shim; Gyoyoung Jin; Eunseung Chung; Yonghan Roh
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

This paper addresses a methodology for building robust design rules by using design based metrology (DBM). Conventional method for building design rules has been using a simulation tool and a simple pattern spider mask. At the early stage of the device, the estimation of simulation tool is poor. And the evaluation of the simple pattern spider mask is rather subjective because it depends on the experiential judgment of an engineer. In this work, we designed a huge number of pattern situations including various 1D and 2D design structures. In order to overcome the difficulties of inspecting many types of patterns, we introduced Design Based Metrology (DBM) of Nano Geometry Research, Inc. And those mass patterns could be inspected at a fast speed with DBM. We also carried out quantitative analysis on PWQ silicon data to estimate process variability. Our methodology demonstrates high speed and accuracy for building design rules. All of test patterns were inspected within a few hours. Mass silicon data were handled with not personal decision but statistical processing. From the results, robust design rules are successfully verified and extracted. Finally we found out that our methodology is appropriate for building robust design rules.

Paper Details

Date Published: 29 March 2013
PDF: 7 pages
Proc. SPIE 8684, Design for Manufacturability through Design-Process Integration VII, 86840Q (29 March 2013); doi: 10.1117/12.2009583
Show Author Affiliations
Myeongdong Lee, Sungkyunkwan Univ. (Korea, Republic of)
Samsung Electronics Co., Ltd. (Korea, Republic of)
Seiryung Choi, Samsung Electronics Co., Ltd. (Korea, Republic of)
Jinwoo Choi, Samsung Electronics Co., Ltd. (Korea, Republic of)
Jeahyun Kim, Samsung Electronics Co., Ltd. (Korea, Republic of)
Hyunju Sung, Samsung Electronics Co., Ltd. (Korea, Republic of)
Hyunyoung Yeo, Samsung Electronics Co., Ltd. (Korea, Republic of)
Myoungseob Shim, Samsung Electronics Co., Ltd. (Korea, Republic of)
Gyoyoung Jin, Samsung Electronics Co., Ltd. (Korea, Republic of)
Eunseung Chung, Samsung Electronics Co., Ltd. (Korea, Republic of)
Yonghan Roh, Sungkyunkwan Univ. (Korea, Republic of)


Published in SPIE Proceedings Vol. 8684:
Design for Manufacturability through Design-Process Integration VII
Mark E. Mason; John L. Sturtevant, Editor(s)

© SPIE. Terms of Use
Back to Top