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Proceedings Paper

Vertically integrated double-layer on-chip crystalline silicon nanomembranes based on adhesive bonding
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Paper Abstract

In this paper we demonstrate a three-dimensional (3D) photonic integration scheme based on crystalline silicon. We develop a process using SU-8 based adhesive bonding to fabricate vertically stacked, double-layer silicon nanomembranes. A single-layer silicon photonic integrated circuit fabricated on a silicon-on-insulator (SOI) chip and a bare SOI chip are bonded together, followed by removal of the bare SOI chip’s silicon substrate and buried oxide layer, to form a silicon nanomembrane as a platform for additional photonic layer. We designed and fabricated subwavelength nanostructure based fiber-to-chip grating coupler on the bonded silicon nanomembrane, and also inter-layer grating coupler for coupling between two silicon nanomembranes. The fiber-to-chip grating coupler has a peak efficiency of -3.9 dB at 1545 nm operating wavelength with transverse-electric (TE) polarization. The inter-layer grating coupler has a peak efficiency of -6.8 dB at 1533 nm operating wavelength with TE polarization. The demonstrated approach serves as a potential solution for 3D photonic integration and novel 3D photonic devices.

Paper Details

Date Published: 27 February 2013
PDF: 7 pages
Proc. SPIE 8630, Optoelectronic Interconnects XIII, 863019 (27 February 2013); doi: 10.1117/12.2005440
Show Author Affiliations
Yang Zhang, The Univ. of Texas at Austin (United States)
David Kwong, The Univ. of Texas at Austin (United States)
Xiaochuan Xu, The Univ. of Texas at Austin (United States)
Amir Hosseini, Omega Optics, Inc. (United States)
Sang Y. Yang, Univ. of Illinois at Urbana-Champaign (United States)
John A. Rogers, Univ. of Illinois at Urbana-Champaign (United States)
Ray T. Chen, The Univ. of Texas at Austin (United States)


Published in SPIE Proceedings Vol. 8630:
Optoelectronic Interconnects XIII
Alexei L. Glebov; Ray T. Chen, Editor(s)

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