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Proceedings Paper

Automatic classification of defects in semiconductor devices
Author(s): John R. Dralla; John C. Hoff
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Paper Abstract

In recent years autcinatic defect detection systems have been used to detect the presence of sub-micron defects in semiconductor devices . The analysis of the defects has been traditionally performed off-line and delegated to trained fab personnel using semi-autcmatic review systems . The purpose of this paper is to report on the development of an in-line autcmatic classification capability, which will be used in conjunction with an automatic defect detecticn system. The technology to be discussed in the paper is based upn reflected light microscopy, digital image processing techniques and unique algorithms . Definiticns of classification, as applied to semiconductor multi-level patterned wafers, will be presented . The schema developed for a unique set of examples will be discussed. The paper will conclude with a discussion of the limitaticns of the approach and the directicns for future development.

Paper Details

Date Published: 1 June 1990
PDF: 10 pages
Proc. SPIE 1261, Integrated Circuit Metrology, Inspection, and Process Control IV, (1 June 1990); doi: 10.1117/12.20044
Show Author Affiliations
John R. Dralla, Optical Specialties, Inc. (United States)
John C. Hoff, Optical Specialties, Inc. (United States)


Published in SPIE Proceedings Vol. 1261:
Integrated Circuit Metrology, Inspection, and Process Control IV
William H. Arnold, Editor(s)

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