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Proceedings Paper

Implementation of PCI Express bus communication for FPGA-based data acquisition system
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Paper Abstract

This paper presents a PCI Express based system dedicated for communication with FPGA in data acquisition systems. The system consisted of FPGA IP core containing PCIE endpoint tightly coupled with with the user core (further denoted as “USR core”) and the DDR3 memory controller, together with Linux device driver. The Linux OS was running on top of typical x86-64 system.

Paper Details

Date Published: 15 October 2012
PDF: 6 pages
Proc. SPIE 8454, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2012, 84540N (15 October 2012); doi: 10.1117/12.2000232
Show Author Affiliations
Adrian Byszuk, Warsaw Univ. of Technology (Poland)
Jacek Kołodziejski, Warsaw Univ. of Technology (Poland)
Grzegorz Kasprowicz, Warsaw Univ. of Technology (Poland)
Krzysztof Poźniak, Warsaw Univ. of Technology (Poland)
Wojciech M. Zabołotny, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 8454:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2012
Ryszard S. Romaniuk, Editor(s)

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