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Proceedings Paper

Table-type modular arithmetic processors for digital image processing
Author(s): A. Kolyada; E. Otlivanchik; V. Revinsky; A. Vasilevitch
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Paper Abstract

Implementation of real-time digital image processing, which is needed in a variety of modern scientific and technical applications, involves considerable difficulties. These difficulties occur because of rigid requirements on the speed of the hardware used. An application of a complex designing concept of high-speed systems for digital image processing (DIP) gives us the tools for solving some of the problems. The new direction of research and development for solving these problems consists in the introduction of pipeline LSI and VLSI table type structure devices. This article suggests an approach based on computer arithmetic using the mew modification of classic modular number system (MNS) -- minimal redundant modular number system.

Paper Details

Date Published: 19 January 1995
PDF: 5 pages
Proc. SPIE 2363, 5th International Workshop on Digital Image Processing and Computer Graphics (DIP-94), (19 January 1995); doi: 10.1117/12.199626
Show Author Affiliations
A. Kolyada, Central Design Institute of Unique Instrumentation (Russia)
E. Otlivanchik, Central Design Institute of Unique Instrumentation (Russia)
V. Revinsky, Central Design Institute of Unique Instrumentation (Russia)
A. Vasilevitch, Central Design Institute of Unique Instrumentation (Russia)


Published in SPIE Proceedings Vol. 2363:
5th International Workshop on Digital Image Processing and Computer Graphics (DIP-94)
Nikolai A. Kuznetsov; Victor A. Soifer, Editor(s)

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