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Proceedings Paper

VLSI-oriented architectures for real-time image processing
Author(s): Wolf-Ekkehard Blanz
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Paper Abstract

Real time computer vision applications require extremely high processing speeds which are very challenging for architectures as well as VLSI technologies. In this paper we investigate two different VLSI and architectural approaches to the decision analysis part of a complex low level image segmentation architecture (LISA). The two different technological approaches are full custom application specific integrated circuits (ASIC) and programmable gate arrays. The two different architectures are a modification of a classical statistical classifier and a connectionist approach using a layered feed forward net. We will also briefly mention the feature extraction part of the architecture, which is essential to understand the complete architecture and is realized using both technologies. LISA as a whole is capable of performing real time (20 M pixels/sec) grey level image segmentation based on grey level and textural properties of the objects. The architectures and technologies will be compared in terms of development time, design methodology, and finally experimental results will be shown.

Paper Details

Date Published: 1 July 1990
PDF: 12 pages
Proc. SPIE 1246, Parallel Architectures for Image Processing, (1 July 1990); doi: 10.1117/12.19568
Show Author Affiliations
Wolf-Ekkehard Blanz, IBM/Almaden Research Ctr. (United States)

Published in SPIE Proceedings Vol. 1246:
Parallel Architectures for Image Processing
Joydeep Ghosh; Colin G. Harrison, Editor(s)

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