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Proceedings Paper

Architecture of a complex arithmetic processor for communication signal processing
Author(s): Susan L. Gilfeather; John B. Gehman; Calvin Harrison
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Paper Abstract

The Complex Arithmetic Processor (CAP) is a high performance, single chip Digital Signal Processor optimized for communication signal processing operations. The CAP VLSI provides the communication system building block necessary to meet the increased signal processing requirements of complex modulation types, voice and image compression while maintaining the requirement for small, low power implementations. The chip is intended for high speed, low power digital communication system applications such as hand held spread spectrum communications systems. The CAP architecture has been developed specifically for the complex arithmetic functions required in communication signal processing. The CAP is a software programmable, highly integrated parallel array of processors containing the arithmetic resources, memories, address generation, bit manipulation and logic functions necessary to support the sophisticated processing required in advanced communication equipment. The CAP executes a 1024 point complex Fast Fourier Transform in 131 microseconds.

Paper Details

Date Published: 28 October 1994
PDF: 12 pages
Proc. SPIE 2296, Advanced Signal Processing: Algorithms, Architectures, and Implementations V, (28 October 1994); doi: 10.1117/12.190874
Show Author Affiliations
Susan L. Gilfeather, Motorola Government and Systems Technology Group (United States)
John B. Gehman, Motorola Government and Systems Technology Group (United States)
Calvin Harrison, Motorola Government and Systems Technology Group (United States)


Published in SPIE Proceedings Vol. 2296:
Advanced Signal Processing: Algorithms, Architectures, and Implementations V
Franklin T. Luk, Editor(s)

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