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Proceedings Paper

Particle metrology for microelectronics
Author(s): Marylyn Hoy Bennett
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Paper Abstract

Particles, defects, and microcontaminaton: the bane of the IC process engineer! Controlling defects during every processing step of semiconductor devices is vital to successful manufacturing of modem chips. The requirements for tight defect control become increasingly severe with each new generation of semiconductors. For a typical 16 MB DRAM process, the total number of defects must be less than one for each 4 cm2 Gf Wafer surface area in order to achieve 70% yield on the wafer.1 Not only must the total number of defects on wafers decrease with each generation, the defect concentration per mask level must be reduced at an ever faster rate due to higher circuit complexity and increased number of mask levels. These defect reduction requirements are noted here for DRAMs, used as the technology driver, but must also be achieved in other device families such as ASICs and microprocessors.

Paper Details

Date Published: 1 July 1994
PDF: 41 pages
Proc. SPIE 10274, Handbook of Critical Dimension Metrology and Process Control: A Critical Review, 102740D (1 July 1994); doi: 10.1117/12.187455
Show Author Affiliations
Marylyn Hoy Bennett, Texas Instruments Inc. (United States)


Published in SPIE Proceedings Vol. 10274:
Handbook of Critical Dimension Metrology and Process Control: A Critical Review
Kevin M. Monahan, Editor(s)

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