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Proceedings Paper

Subpopulation model for void-related early failure in VLSI interconnects
Author(s): Satish S. Menon; Kelvin F. Poole
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Paper Abstract

A subpopulation model is used to provide a quantitative measure of the early failures in VLSI interconnects resulting from the presence of defects. Defects are attributed to processing flaws caused by particulates, improper etching, saturated stress voids, or similar causes. The model includes the effect of defect severity, grain size distribution and linewidth. To validate the model, life-tests were conducted using aluminum alloy interconnect test structures with and without a TiW barrier underlayer. Test structures included interconnects which contained lithographically introduced subtractive defects of various severities. The model and the supporting data show that greater voids in smaller grained and wider lines cause early failure with greater probability. An important conclusion of this work is that the study of the exact nature of electromigration failure distribution (Weibull or lognormal or multilognormal) is not as important as the study of defect related failures that dominate the very early failures.

Paper Details

Date Published: 14 September 1994
PDF: 12 pages
Proc. SPIE 2334, Microelectronics Manufacturability, Yield, and Reliability, (14 September 1994); doi: 10.1117/12.186768
Show Author Affiliations
Satish S. Menon, Clemson Univ. (United States)
Kelvin F. Poole, Clemson Univ. (United States)

Published in SPIE Proceedings Vol. 2334:
Microelectronics Manufacturability, Yield, and Reliability
Barbara Vasquez; Hisao Kawasaki, Editor(s)

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