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Proceedings Paper

Hierarchical heterogeneous multiprocessor system for real-time motion picture coding
Author(s): Sang Hoon Choi; Choon Lee; Young Gil Kim; Seong Won Ryu; Kyu Tae Park
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Paper Abstract

A multiprocessor system for high-speed processing of hybrid image coding algorithms such as H.261, MPEG or digital HDTV is presented in this study. Using a combination of a highly parallel 32-bit microprocessor and function specific devices controlled by microprogrammed controller, a new processing module is designed for a high performance coding system. In this study, we use 32-bit transputers for overall control and for operations requiring small amount of computation such as quantization, and function specific devices for repeated operation such as DCT and motion estimation. We constructed the motion picture coder using geometrical parallel processing techniques for inter processing module and algorithmic parallel processing for intra module since a single module alone cannot perform hybrid coding system algorithms at high speed.

Paper Details

Date Published: 16 September 1994
PDF: 11 pages
Proc. SPIE 2308, Visual Communications and Image Processing '94, (16 September 1994); doi: 10.1117/12.185934
Show Author Affiliations
Sang Hoon Choi, Goldstar Co., Ltd. (South Korea)
Choon Lee, Goldstar Co., Ltd. (South Korea)
Young Gil Kim, Goldstar Co., Ltd. (South Korea)
Seong Won Ryu, Yonsei Univ. (South Korea)
Kyu Tae Park, Yonsei Univ. (South Korea)


Published in SPIE Proceedings Vol. 2308:
Visual Communications and Image Processing '94
Aggelos K. Katsaggelos, Editor(s)

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