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Proceedings Paper

4Kx2K pixel three-side buttable CCD imager design and fabrication
Author(s): Paul P. Suni; Victor Tsai; Peter Vutz
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Paper Abstract

A 4096 X 2048-pixel three-side buttable scientific CCD imager was designed and fabricated for use in electronic imaging applications that require mosaics of many closely spaced large area CCDs that have good low-light-level performance. The three-side buttable CCD design, which allows 8192 X (N X 2048) pixel mosaicking, was fabricated using a custom three-level polyscientific CCD process. The CCD has 15 micron square pixels and employs a full-frame MPP mode device architecture with a single split serial shift register and two on-chip amplifiers. Excellent performance characteristics were demonstrated, including less than 5 electron noise at a 50 kHz output data rate, charge transfer efficiency greater than 0.999997, and an exceptionally low density of small signal charge traps at the characterization temperature. The on-chip CCD amplifier high-frequency operation was characterized separately and the amplifier was found to support a 5-MHz output data rate corresponding to a readout cycle of 0.84 seconds for higher frame rate applications.

Paper Details

Date Published: 1 May 1994
PDF: 9 pages
Proc. SPIE 2172, Charge-Coupled Devices and Solid State Optical Sensors IV, (1 May 1994); doi: 10.1117/12.172763
Show Author Affiliations
Paul P. Suni, Orbit Semiconductor, Inc. (United States)
Victor Tsai, Orbit Semiconductor, Inc. (United States)
Peter Vutz, Orbit Semiconductor, Inc. (United States)


Published in SPIE Proceedings Vol. 2172:
Charge-Coupled Devices and Solid State Optical Sensors IV
Morley M. Blouke, Editor(s)

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