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Proceedings Paper

Comparison of rapid thermal processing and furnace processing for quarter-micrometer CMOS
Author(s): Badih El-Kareh; Ashwin Ghatalia; Mark D. Kellam; Philippe Maillot; Carlton M. Osburn; Xiaoqiang Zhang
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Paper Abstract

A comparison was made between rapid-thermal processing and furnace processing with respect to gate oxidation, polysilicon sidewall oxidation, and junction activation anneal. NMOS and PMOS structures with N+ polysilicon gates, 6.5 nm gate oxide, and 70 nm source/drain junction depths were processed in parallel, using one-mask FET test structures to define MOSFETs with channel lengths down to 0.18 micrometers . Good NMOS device characteristics and low junction leakage were observed for all experimental combinations. Rapid-thermal and furnace oxidation exhibited similar gate-oxide breakdown characteristics.

Paper Details

Date Published: 15 February 1994
PDF: 15 pages
Proc. SPIE 2091, Microelectronic Processes, Sensors, and Controls, (15 February 1994); doi: 10.1117/12.167352
Show Author Affiliations
Badih El-Kareh, SEMATECH (United States)
Ashwin Ghatalia, SEMATECH (United States)
Mark D. Kellam, Microelectronics Ctr. of North Carolina (United States)
Philippe Maillot, SEMATECH (United States)
Carlton M. Osburn, North Carolina State Univ. (United States)
Xiaoqiang Zhang, Duke Univ. (United States)

Published in SPIE Proceedings Vol. 2091:
Microelectronic Processes, Sensors, and Controls
Kiefer Elliott; James A. Bondur; James A. Bondur; Kiefer Elliott; John R. Hauser; John R. Hauser; Dim-Lee Kwong; Asit K. Ray, Editor(s)

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