Share Email Print

Proceedings Paper

Bit synchronization in multigigabit receivers
Author(s): J. Nuno Matos; Atilio M. S. Gameiro; Paulo M.P. Monteiro; Jose Ferreira da Rocha
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

In this paper we report the design and implementation of bit synchronizers for multigigabit transmission systems. We present the main features of dielectric resonators (DRs) and considerations to take into account when using them as filters for clock recovery circuits. We address the problem of using balanced and unbalanced nonlinear circuits (NLs) for which we perform a theoretical analysis of the full-wave and truncated squarer non-linearities. Finally we describe the design of a prototype for a 10 Gbit/s system and report measurements obtained with it.

Paper Details

Date Published: 4 November 1993
PDF: 12 pages
Proc. SPIE 1974, Transport Technologies for Broadband Optical Access Networks, (4 November 1993); doi: 10.1117/12.161502
Show Author Affiliations
J. Nuno Matos, Univ. of Aveiro (Portugal)
Atilio M. S. Gameiro, Univ. of Aveiro (Portugal)
Paulo M.P. Monteiro, Univ. of Aveiro (Portugal)
Jose Ferreira da Rocha, Univ. of Aveiro (Portugal)

Published in SPIE Proceedings Vol. 1974:
Transport Technologies for Broadband Optical Access Networks
Robert A. Cryan; P. Nalinjai Fernando; John M. Senior; Winston I. Way, Editor(s)

© SPIE. Terms of Use
Back to Top