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Proceedings Paper

High-performance, miniaturized processor trends
Author(s): Paul A. White; Lynda Ledford Graceffo; John D. Hodapp; Dolores A. Shaffer; Jon C. Hiller; Edward Monachino
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Paper Abstract

It is widely recognized that processors developed for many different uses in the near future must be faster, more versatile, easier to use, less costly, and -- in many cases -- smaller than those currently available. The required increase in functionality is associated with many factors, including: (1) the increasing complexity of the algorithms being developed for various applications (e.g., aided/automatic target recognition -- ATR); (2) the development of larger sensor arrays for both focal plane arrays (FPAs) and synthetic aperture radars (SARs); (3) real-time performance needs for processing-intensive systems deployed on a wide variety of platforms; (4) more-stringent requirements on sensor resolution; (5) the need for effective sensor fusion to handle data available from multiple sources; (6) increased intra- and inter- platform communications; and (7) hardware/software development and implementation costs. This paper discusses ongoing and required work related to component development and electronics packaging critical to meeting future processing requirements within reasonable size, weight, and power constraints.

Paper Details

Date Published: 20 October 1993
PDF: 12 pages
Proc. SPIE 1957, Architecture, Hardware, and Forward-Looking Infrared Issues in Automatic Target Recognition, (20 October 1993); doi: 10.1117/12.161435
Show Author Affiliations
Paul A. White, ARPA (United States)
Lynda Ledford Graceffo, U.S. Army Night Vision and Electronic Sensors Directorate (United States)
John D. Hodapp, U.S. Army Night Vision and Electronic Sensors Directorate (United States)
Dolores A. Shaffer, U.S. Army Night Vision and Electronic Sensors Directorate (United States)
Jon C. Hiller, Science and Technology Associates, Inc. (United States)
Edward Monachino, Science and Technology Associates, Inc. (United States)


Published in SPIE Proceedings Vol. 1957:
Architecture, Hardware, and Forward-Looking Infrared Issues in Automatic Target Recognition
Lynn E. Garn; Lynda Ledford Graceffo, Editor(s)

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