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Proceedings Paper

1152 x 64 time delay and integration visible imaging CCD with tin oxide gates
Author(s): Eric S. Juergensen; John P. Ebner; Bron R. Frias; Arlene A. Santos; Robert Thomas Tacka; Alfred P. Turley
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Paper Abstract

An 8 micrometers pixel 1152 X 64 stage time delay and integration scanning visible imaging CCD which uses transparent tin oxide gates has been fabricated. The tin oxide gates provide a front side illuminated device with a peak quantum efficiency of greater than 80%. The chip features forward and reverse scan, variable TDI and commandable pixel size by the use of aggregation wells. The 1152 detector columns are subdivided into 8 subchips of 144 detector columns each. Buried Channel Charge Handling Capacity (CHC) of 100 ke- and Charge Transfer Efficiency (CTE) of 0.99999 has been measured. It is designed to operate at variable scan rates up to 52,000 lines per second.

Paper Details

Date Published: 15 November 1993
PDF: 5 pages
Proc. SPIE 1952, Surveillance Technologies and Imaging Components, (15 November 1993); doi: 10.1117/12.161421
Show Author Affiliations
Eric S. Juergensen, Westinghouse Electric Corp. (United States)
John P. Ebner, Westinghouse Electric Corp. (United States)
Bron R. Frias, Westinghouse Electric Corp. (United States)
Arlene A. Santos, Westinghouse Electric Corp. (United States)
Robert Thomas Tacka, Westinghouse Electric Corp. (United States)
Alfred P. Turley, Westinghouse Electric Corp. (United States)


Published in SPIE Proceedings Vol. 1952:
Surveillance Technologies and Imaging Components
Sankaran Gowrinathan; C. Bruce Johnson; James F. Shanley, Editor(s)

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