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Proceedings Paper

Valley Oakes/Cincinnati Electronics 256 x 256 InSb array evaluation
Author(s): Julie B. Heynssens; Albert M. Fowler
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Paper Abstract

This array was developed for use in future NASA space infrared instrumentation and was funded by Craig McCreight at NASA Ames Research Center. The multiplexer was designed at Valley Oakes Semiconductor and fabricated using TRW's radiation hard 1.2 micron CMOS process as a baseline. Several processing variants were explored as this effort was directed toward the development of a low temperature (< 10 K) multiplexer. The 8 to 256 CMOS address decoders allow for random access and subarray readouts. Cincinnati Electronics developed the 2-D array of photovoltaic InSb mesa diodes. Much of this paper presents an evaluation of the bare multiplexer to determine the optimal operating point of the hybrid array. At 10 K, the detector reset node must be operated at a minimum of 2.2 V with respect to the reset on control signal (multiplexer ground) to overcome the threshold drop of the PMOS reset transistor. A linear regression of the multiplexer response at 10 K indicates that for linear gain response the reset voltage must be between 2.4 to 2.8 V. The standard deviation of the pedestal values gives an indication of multiplexer uniformity and is 32.0 mV. Charge pumping through the reset transistor adds bias to the detector. Within the operating range of the multiplexer, this charge pumping was measured to be 70 to 100 mV. The multiplexer operates continuously from 77 to 10 K with no anomalies due to threshold crossover in the CMOS gates.

Paper Details

Date Published: 20 October 1993
PDF: 6 pages
Proc. SPIE 1946, Infrared Detectors and Instrumentation, (20 October 1993); doi: 10.1117/12.158727
Show Author Affiliations
Julie B. Heynssens, National Optical Astronomy Observatories (United States)
Albert M. Fowler, National Optical Astronomy Observatories (United States)

Published in SPIE Proceedings Vol. 1946:
Infrared Detectors and Instrumentation
Albert M. Fowler, Editor(s)

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