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Proceedings Paper

Parallel VLSI-oriented algorithm and architecture for computing histogram of images
Author(s): Heng-Da Cheng; Xueqin Li; Lifeng Wang
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Paper Abstract

The histogram of an image conveys information about the brightness and contrast of the image, and is used to manipulate these features. Histogram has many applications in image processing and may be needed at different processing stages. In this paper, we propose a parallel algorithm for computing the histogram of limited-width (such as gray-level) values. The essential parallelism and simplicity of the proposed algorithm make it easy to implement by using a VLSI array architecture. Each pixel only needs to perform addition and comparison, and communicate only with its immediate neighbor pixels during the entire computation period. The histograms for pre-load and in-load images can be computed using the proposed architecture. The time complexity for the proposed algorithm is O(N), comparing with O(N2) if using a uniprocessor, where N is the dimension of the image plane. The algorithm partition issue has also been studied.

Paper Details

Date Published: 22 October 1993
PDF: 8 pages
Proc. SPIE 2094, Visual Communications and Image Processing '93, (22 October 1993); doi: 10.1117/12.157864
Show Author Affiliations
Heng-Da Cheng, Utah State Univ. (United States)
Xueqin Li, Utah State Univ. (United States)
Lifeng Wang, Utah State Univ. (United States)


Published in SPIE Proceedings Vol. 2094:
Visual Communications and Image Processing '93
Barry G. Haskell; Hsueh-Ming Hang, Editor(s)

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