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Proceedings Paper

Report on the NIST low-accelerating-voltage SEM magnification standard interlaboratory study
Author(s): Michael T. Postek; Andras E. Vladar; Samuel N. Jones; William J. Keery
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Paper Abstract

NIST is in the process of developing a new scanning electron microscope (SEM) magnification calibration reference standard useful at both high and low accelerating voltages. This standard will be useful for all applications to which the SEM is currently being used, but it has been specifically tailored to meet many of the particular needs of the semiconductor industry. A small number of test samples with the pattern were prepared on silicon substrates using electron beam lithography at the National Nanofabrication Facility at Cornell University. The structures were patterned in titanium/palladium with maximum nominal pitch structures of approximately 3000 micrometers scaling down to structures with minimum nominal pitch of 0.4 micrometer. Eighteen of these samples were sent out to a total of 35 university, research, semiconductor and other industrial laboratories in an interlaboratory study. The purpose of the study was to test the SEM instrumentation and to review the suitability of the sample design. The results of the analysis of the data obtained in this study are presented in this paper.

Paper Details

Date Published: 4 August 1993
PDF: 19 pages
Proc. SPIE 1926, Integrated Circuit Metrology, Inspection, and Process Control VII, (4 August 1993); doi: 10.1117/12.148941
Show Author Affiliations
Michael T. Postek, National Institute of Standards and Technology (United States)
Andras E. Vladar, National Institute of Standards and Technology (United States)
Samuel N. Jones, National Institute of Standards and Technology (United States)
William J. Keery, National Institute of Standards and Technology (United States)


Published in SPIE Proceedings Vol. 1926:
Integrated Circuit Metrology, Inspection, and Process Control VII
Michael T. Postek, Editor(s)

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